The KCU1250 Characterization Kit provides everything you need to evaluate the 20 GTH 16.3Gbps transceivers available on the UltraScale™ XCKU040-FFVA1156 FPGA. Access to both the Integrated Bit Error Ratio Test (IBERT) demonstration and the Vivado® Design Suite enables quick evaluation of the industry leading GTH transceivers. Each GTH Quad and its associated reference clock are routed from the FPGA to the BullsEye connector pad. This enables users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment.

• Hardware environment for characterizing and evaluating the GTH transceivers on UltraScale XCKU040-2FFVA1156E FPGA

• Hardware, design tools, IP, and pre-verified reference designs

• Integrated Bit Error Ratio Test (IBERT) reference design

• BullsEye connector supporting a full GTH quad, with four transmit/receive pairs

• Five Samtec BullsEye connector pads for the GTH transceivers and reference clocks

• Two pairs of differential MRCC inputs with SMA connectors expand I/O with 3 FPGA Mezzanine Card (FMC) interfaces

Communication & Networking

• Five Samtec BullsEye connector pads for interfacing to the 20 GTH transceivers and their associated reference clocks

• Two pairs of differential MRCC inputs with SMA connectors

• USB-to-UART bridge

Clocking

• Fixed, 200 MHz 2.5V LVDS oscillator wired to multi-region clock capable (MRCC) inputs

• SuperClock-2 module supporting multiple frequencies

Display

• Power status LEDs

• General purpose DIP switches, LEDs, push buttons, and test I/O

Expansion Connectors

• Three VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connectors

Memory

• SD controller

Power

• PMBus connectivity to on-board digital power supplies

Control & I/O

• I2C Bus